Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a unit block circuit of a semiconductor device including a reservoir capacitor which is improved to obtain efficient space utilization within the unit block circuit formed in a peripheral region.
In a semiconductor device, such as a dynamic random access memory (DRAM), a circuit region may be divided into a core region in which cells storing data are arranged, and a peripheral region in which circuits related to data input/output are arranged.
The peripheral region may include unit block circuits which manage functions necessary for data input/output. The unit block circuit is a unit cell in which transistors implementing at least one logic operation are formed, and is also called a leaf cell.
FIG. 1 is a layout diagram illustrating a structure of a typical MOS transistor.
As shown in FIG. 1, a MOS transistor configured in the unit block circuit includes a gate 10, an active region 12, and contacts 14.
The gate 10 is patterned on the active region 12, and portions of the active region 12 on opposite sides of the gate 10 correspond to a source and a drain. The source and the drain formed at opposite sides of the active region 12 are electrically connected to a top conductive layer by the contacts 14. In this manner, transistors each having the gate, the source, and the drain are fabricated.
FIG. 2 is a layout diagram illustrating a typical unit block circuit comprising a plurality of MOS transistors.
The above-described transistors of FIG. 1 constitute a unit block circuit of FIG. 2. Referring to FIG. 2, an N well is formed on a P well, and a pickup unit 20 defining a rectangular closed loop is formed in the N well. Transistors in which one or more gates are formed on the active region 24 are formed within the pickup unit 20. Contacts 26 are formed in the active region 24 including the source and the drain regions.
Meanwhile, if necessary, the peripheral region may include a reservoir capacitor so as to ensure a capacitance for potential stabilization.
The reservoir capacitor is designed in the peripheral region in order to ensure a sufficient capacitor region within semiconductor devices which are becoming more highly integrated. In general, the reservoir capacitor has a decoupling function.
However, as the semiconductor memory device becomes more highly integrated, a chip size tends to be reduced and a spare space where the reservoir capacitor can be formed in the peripheral region tends to be reduced, as well.
Therefore, it is necessary to ensure a sufficient capacitance in order to supply a more stable voltage to a semiconductor memory device. To this end, there is a need to ensure a space where reservoir capacitors can be formed in the semiconductor memory device.
In the above-described unit block circuit of FIG. 2, a spare space 28 remaining after the formation of the transistors exists in the rectangular pickup unit 20. It is necessary to seek ways of using the spare space 28 to ensure a capacitance.
Therefore, there is a need to suggest a method for forming a reservoir capacitor in a spare space defined within a unit block circuit of FIG. 2.